This invention relates generally to the etching process used in semiconductor manufacture, and more particularly to an inventive partial photoresist etching process.
Patterning is one of the basic steps performed in semiconductor processing. Patterning is also referred to as photolithography, masking, oxide or metal removal, and microlithography. Patterning enables the selective removal of material deposited on a semiconductor substrate, or wafer, as a result of deposition. The process of depositing layers and removing selective parts of them, in conjunction with other processes, permits the fabrication of semiconductor devices.
Patterning can be a dry etching or a wet etching process. Wet etching refers to the use of wet chemical processing to selectively remove the material from the wafer. The chemicals are placed on the surface of the wafer, or the wafer itself is submerged in the chemicals. Dry etching refers to the use of plasma stripping, using a gas such as oxygen (O2), C2F6 and O2, or another gas. Whereas wet etching is a low-temperature process, dry etching is typically a high-temperature process.
One common type of dry etching uses photoresist, which is described in conjunction with FIGS. 1A-1E. In FIG. 1A, a stop layer 102 is initially deposited. The stop layer 102 may be a type of oxide, and prevents the etchant from removing material beyond the stop layer 102. Next, there is a layer of polysilicon 104, which is specifically not doped, and of which an xe2x88x92type region 106 and a P+ type region 108 have been specifically doped. There is also a hard mask 110. The hard mask 110 may be silicon dioxide, silicon nitride, an inorganic anti-reflective coating, or another type of mask. Finally, there is a layer of photoresist 112.
In FIG. 1B, a mask 114 is placed over the photoresist 112. The mask 114 includes dark regions 116 and 118. Ultraviolet rays 120 are then applied, which develops, or exposes, those parts of the photoresist 112 not directly underneath the dark regions 116 and 118, which are indicated as the photoresist 112xe2x80x2. The unexposed photoresist 112 is unpolymerized, whereas the exposed photoresist 112xe2x80x2 is polymerized.
In FIG. 1C, the photoresist 112xe2x80x2 that was polymerized as a result of exposure to the ultraviolet rays 120 is developed, or removed. The only remaining photoresist is the unpolymerized photoresist 112 beneath the dark regions 116 and 118. Thus, the remaining photoresist 112 has a pattern corresponding to the dark regions 116 and 118 of the mask 114.
In FIG. 1D, the mask 114, the xe2x88x92type region 106, the P+ type region 108, and the polysilicon 104 are etched. The only parts of the mask 114, the regions 106 and 108, and the polysilicon 104 that remain are those underneath the remaining photoresist 112. Finally, in FIG. 1E, the remaining, unpolymerized photoresist 112 is stripped, resulting in an xe2x88x92type stack 122, and a P+ type stack 124.
Another type of dry etching does not use photoresist. This photoresist-free etching instead uses the hard mask itself for the patterning of the underlying polysilicon. This type of etching is described in conjunction with FIGS. 2A-2D. In FIG. 2A, a stop layer 102 is initially deposited. Next, there is a layer of polysilicon 104, which is specifically not doped, and of which an xe2x88x92type region 106 and a P+ region 108 have been specifically doped. Finally, there is a hard mask 110. In FIG. 2B, a mask 114 is placed over the hard mask 110. The mask 114 includes dark regions 116 and 118. Ultraviolet rays 120 are then applied, which develops, or exposes, those parts of the hard mask 110 that are not directly underneath the dark regions 116 and 118, and that are indicated as the hard mask 110xe2x80x2.
In FIG. 2C, the hard mask 110xe2x80x2 that was exposed to the ultraviolet rays 120 is removed. The only remaining hard mask 110 is that which was beneath the dark regions 116 and 118. Therefore, the remaining hard mask 110 has a pattern corresponding to the dark regions 116 and 118 of the mask 114. In FIG. 2D, the N-type region 106, the P+ region 108, and the polysilicon 104 are etched. The only parts of the regions 106 and 108 and the polysilicon 104 that remain are those underneath the remaining hard mask 114. Thus, there is an xe2x88x92type stack 122 and a P+ type stack 124.
The result of the photoresist-free dry etching process shown in FIG. 2D is therefore theoretically identical to the result of the photoresist dry etching process shown in FIG. 1E. However, each of these processes has advantages and disadvantages. The photoresist of the photoresist process acts as a passivation surface, which helps to ensure the proper shaping of the profiles of the stacks 122 and 124. That is, the passivation functionality of the photoresist ensures that the vertical surfaces of the stacks 122 and 124 are substantially perpendicular to the horizontal surface of the stop layer 102.
Disadvantageously, however, the photoresist process poorly controls the critical dimensions of the semiconductor device being fabricated. The critical dimensions of the device are the widths of the lines and the spaces of critical circuit patterns of the device. In particular, the photoresist process frequently exhibits a proximity effect that can narrow the desired widths of the stacks 122 and 124.
The proximity effect is shown in FIG. 3. The mask 312 positioned over the photoresist 310 has a dark region 314 of a given width, such that ideally the width of the unpolymerized photoresist 310xe2x80x2 is identical after exposure to the ultraviolet rays 316. However, because of the proximity effect, the width of the unpolymerized photoresist 310xe2x80x2 is in fact less than the width of the polymerized photoresist 310. The stack of polysilicon 304, doped polysilicon 306, and hard mask 308 on top of the stop layer 302 that will result, as indicated by the arrow 318 between the dotted lines 320 and 322, will not identically correspond to the dark region 314. That is, the width of the stack will be less than the width of the dark region 314. Where the stack is a critical pattern of the device, this means that the photoresist dry etching process poorly controls the critical dimensions of the device.
By comparison, the photoresist-free dry etching process provides for good control of the critical dimensions of the device being fabricated. However, the lack of photoresist in the photoresist-free process disadvantageously means that no passivation surface is present to help ensure the proper shaping of the profiles of the stacks 122 and 124. Necking of the doped regions 106 and/or 108 may result. Necking is shown in FIG. 4. On top of the stop layer 402 are polysilicon 404, an xe2x88x92type region 406, and a hard mask 408 forming a stack 410. The N-type region 406 of the stack 410 has an hourglass shape, resulting from the etching of this region 406 and the polysilicon 404 underneath the hard mask 408. The hourglass shape results during etching because there is no passivation surface to ensure the proper shaping of the profile of the stack 410.
Therefore, there is a need for a dry etching process that avoids the disadvantages of the photoresist process and the photoresist-free process, while maintaining the advantages of both processes. There is a need for a new etching process that provides for good critical dimension control, desirably by limiting the proximity effect. There is a need for a new etching process that also provides for proper profile shaping, such as that which results resulting from using a passivation surface. For these and other reasons, there is a need for the present invention.
The invention relates to partial photoresist etching. A film on a semiconductor wafer includes a hard mask, doped polysilicon below the hard mask, undoped polysilicon below the doped polysilicon, and a stop layer below the undoped polysilicon. Photoresist etching is performed through the hard mask and the doped polysilicon, but not through the undoped polysilicon, by using a photoresist mask. The photoresist mask imparts a pattern through the hard mask and the doped polysilicon. After the photoresist mask is removed, photoresist-free etching is performed through the undoped polysilicon through to the stop layer. The photoresist-free etching uses the hard mask, which imparts the pattern through the undoped polysilicon. A semiconductor device may be fabricated using this partial photoresist etching process. Such a semiconductor device may include a hard mask and doped polysilicon that were photoresist etched, and undoped polysilicon that was photoresist-free etched.
The invention provides for advantages not found in the photoresist and photoresist-free etching processes of the prior art. In particular, the inventive partial photoresist process avoids the disadvantages of the photoresist and photoresist-free processes, while maintaining their advantages. The partial photoresist process maintains the proper profile shaping of the photoresist process, while avoiding the poor profile shaping of the photoresist-free process. Likewise, the partial photoresist process maintains the good critical dimension control of the photoresist-free process, while avoiding the proximity effect of the photoresist process that results in poor critical dimension control. Still other advantages, embodiments, and aspects of the invention will become apparent by reading the detailed description that follows, and by referencing the attached drawings.